FIELD OF THE INVENTION
The present invention concerns a gate-controlled thyristor, such as a cascode-MOS thyristor in which an insulated gate bipolar transistor (IGBT) in a first cell and a thyristor in a main cell are connected together in such a way that the first cell and the main cell form a lateral FET with a channel of a first conductivity type.
Such a cascode MOS thyristor was already proposed many years ago in Published, Non-Prosecuted German Patent Application DE 30 24 015 A, corresponding to U.S. Pat. No. 4,502,070, and has recently been discussed again as a MOS controlled cascode thyristor (MCCT) (see the report "1200 V MCCT: A New Concept Three Terminal MOS-Gated Thyristor" by N. Iwamuro, T. Iwaana, Y. Harada and Y. Seki at the ISPSD 97 Conference). Such a cascode MOS thyristor, as well as general MOS-controlled bipolar structures, such as IGBTs and MOS Controlled Thyristors (MCTs), are preferred to MOSFETs because of their relatively low start-up resistance. As it is well known, generally speaking, switches should close at as high a voltage as possible, but when they are turned on or are conducting, they should have as low resistance as possible.